Video2015
Why Use Binary?
Computerphile
Argues that binary won because two states are the easiest to tell apart reliably in a noisy physical circuit, not because two is mathematically special.
link checked 17 Sept 2026Computer Architecture
The machine underneath the abstraction.
13 topics · 17 curated works
Topics
- 01Foundations & Overviews
- 02Instruction Set Architecture1
- 03Pipelining1
- 04Superscalar & Out-of-Order Execution1
- 05Cache Hierarchies1
- 06Memory Systems1
- 07Branch Prediction1
- 08Parallel Architectures2
- 09GPU Architecture1
- 10RISC vs CISC2
- 11Digital Logic Design2
- 12Hardware Accelerators2
- 13Performance Modelling2
Reading in Computer Architecture
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Start here
No prior grounding assumed.
Why Use Binary?
Computerphile · 2015
Argues that binary won because two states are the easiest to tell apart reliably in a noisy physical circuit, not because two is mathematically…
Then
Assumes you know the vocabulary.
Validity of the Single Processor Approach to Achieving Large Scale Computing Capabilities
Gene M. Amdahl · 1967
Shows that the serial fraction of a program bounds the speed-up available from parallel hardware, no matter how many processors are added.
+7 more at this level
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Primary sources and full treatments.
The Synthesis of Two-Terminal Switching Circuits
Claude E. Shannon · 1949
Gives a general procedure for building a switching circuit that realises any prescribed Boolean function using the fewest contacts, turning circuit…
+7 more at this level
12 of 17 works
Paper1967
Validity of the Single Processor Approach to Achieving Large Scale Computing Capabilities
Gene M. Amdahl
Shows that the serial fraction of a program bounds the speed-up available from parallel hardware, no matter how many processors are added.
3 pageslink checked 17 Sept 2026FreeIntermediate
Paper1982
Cache Memories
Alan Jay Smith
Surveys cache design choices — size, associativity, line size, write policy — and argues locality of reference, not raw memory speed, is what a cache actually exploits.
FreeIntermediate
Paper1988
Reevaluating Amdahl's Law
John L. Gustafson
Argues Amdahl's Law wrongly assumes problem size is fixed, and that programmers instead scale the problem to fill available processors, so speed-up grows with machine size rather than saturating.
FreeIntermediate
Paper1995
Hitting the Memory Wall: Implications of the Obvious
Wm. A. Wulf & Sally A. McKee
Projects that if processor speed keeps outpacing DRAM latency at their historical rates, most programs will eventually be bound entirely by memory access rather than computation.
PaidIntermediate
Paper2007
A Survey of General-Purpose Computation on Graphics Hardware
Owens et al.
Argues that a GPU's fixed-function pipeline had, by the mid-2000s, become general-purpose enough to reprogram for non-graphics problems, and catalogues what kinds of problems map onto it well.
FreeIntermediate
Paper2008
Amdahl's Law in the Multicore Era
Mark D. Hill & Michael R. Marty
Extends Amdahl's Law to chips built from many identical or specialised cores, showing that a small number of powerful cores can beat many weak ones on partly-serial workloads.
FreeIntermediate
Paper2009
Roofline: An Insightful Visual Performance Model for Floating-Point Programs and Multicore Architectures
Samuel Williams, Andrew Waterman & David Patterson
Plots achievable performance against a kernel's arithmetic intensity, showing from a single chart whether a program is limited by compute throughput or memory bandwidth.
link checked 17 Sept 2026FreeIntermediate
Lecture2021
Digital Design and Computer Architecture — Lecture 13: Pipelining
Onur Mutlu (ETH Zurich)
Works through why splitting instruction execution into overlapping stages raises throughput, and what data, control and structural hazards it introduces in exchange.
FreeIntermediate
Paper1949
The Synthesis of Two-Terminal Switching Circuits
Claude E. Shannon
Gives a general procedure for building a switching circuit that realises any prescribed Boolean function using the fewest contacts, turning circuit minimisation into a solvable algebraic problem.
FreeAdvanced
Paper1964
Architecture of the IBM System/360
Gene M. Amdahl, Gerrit A. Blaauw & Frederick P. Brooks Jr.
Defines architecture as the programmer-visible interface kept separate from implementation, and specifies one instruction set meant to span an entire family of machines at different price points.
FreeAdvanced
Paper1967
An Efficient Algorithm for Exploiting Multiple Arithmetic Units
Robert M. Tomasulo
Describes a hardware scheme that lets independent instructions execute out of program order by renaming their destination registers, resolving hazards without a compiler's help.
FreeAdvanced
In order written
1949 – 2021- 1949The Synthesis of Two-Terminal Switching CircuitsClaude E. Shannon
- 1964Architecture of the IBM System/360Gene M. Amdahl, Gerrit A. Blaauw & Frederick P. Brooks Jr.
- 1967An Efficient Algorithm for Exploiting Multiple Arithmetic UnitsRobert M. Tomasulo
- 1980The Case for the Reduced Instruction Set ComputerDavid A. Patterson & David R. Ditzel
- 1980Comments on 'The Case for the Reduced Instruction Set Computer'Douglas W. Clark & William D. Strecker
- 1982Cache MemoriesAlan Jay Smith
- 1988Reevaluating Amdahl's LawJohn L. Gustafson
- 1991Two-Level Adaptive Training Branch PredictionTse-Yu Yeh & Yale N. Patt
- 1995Hitting the Memory Wall: Implications of the ObviousWm. A. Wulf & Sally A. McKee
- 2007A Survey of General-Purpose Computation on Graphics HardwareOwens et al.
- 2008Amdahl's Law in the Multicore EraMark D. Hill & Michael R. Marty
- 2009Roofline: An Insightful Visual Performance Model for Floating-Point Programs and Multicore ArchitecturesSamuel Williams, Andrew Waterman & David Patterson
- 2011Dark Silicon and the End of Multicore ScalingHadi Esmaeilzadeh, Emily Blem, Renee St. Amant, Karthikeyan Sankaralingam & Doug Burger
- 2015Why Use Binary?Computerphile
- 2017In-Datacenter Performance Analysis of a Tensor Processing UnitNorman P. Jouppi et al.
- 2021Digital Design and Computer Architecture — Lecture 13: PipeliningOnur Mutlu (ETH Zurich)